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Posted: February 21st, 2023
Pipline Processor Design and Simulation
I don’t understand this Engineering question and need help to study.
Your HDL code for the processor must utilize parametric modules, such as multiplexers, program counter, adders, instruction memory, control unit, register file in read first mode, arithmetic logical unit (ALU), sign extension unit, data memory. Your design most be modular, i.e., your design should use a top level module instantiating all the required sub modules of the microarchitecture, including the data path and the controller. You must develop a test bench for testing your processor. you design will be tested by excepting a MIPS program by your designed and implemented processor. Add the hazard unit to your designed and implemented parametric pipelined MIPS processor to solve data hazards by data forwarding and stalling the pipeline, if necessary, and eliminate possible control hazards. All branch decisions should be made in the decode stage.
You most demonstrate your processor operation by executing the attached MIPS instructions.
Requirements: A fully working pipeline | .doc file
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